Modern computing platforms expend significant amounts of time and energy in transmitting data across on-chip and off-chip interconnects. This challenge is exacerbated in prevalent data-intensive workloads such as machine learning, data analytics and search. However, these workloads also present a unique opportunity in the form of intrinsic resilience to approximations in computations and data. We explore approximate compression of communication traffic, which lever-ages this intrinsic resilience to improve communication bandwidthand reduce the energy consumed by interconnects. Specifically, wepropose AxBA, an approximate bus architecture framework thatis aware of the data amenable to approximations and seamlesslycompresses/decompresses the corresponding transactions on the buswithout requiring any changes to pre-designed masters and slaves.AxBA uses a lightweight compression scheme based on approxi-mate deduplication, which is suitable for the tight latency constraintsimposed by bus-based interconnects. To facilitate software develop-ment on AxBA-based systems, we introduce a software interfacethat enables programmers to identify regions of the system addressspace that are amenable to approximations. We also propose a run-time quality monitoring framework that automatically determinesthe error constraints for the identified regions such that a specifiedapplication-level quality is maintained. We demonstrate the fea-sibility of the proposed concepts by realizing a prototype AxBAsystem on a Cyclone-IV FPGA development board using an IntelNios II processor-based SoC. Across a suite of six machine learningbenchmarks, AxBA obtains an average improvement in system performance of 29%and a 25%reduction in system-level energy for a 0.5%loss in application-level quality.